Parallel inverter system

ABSTRACT

The invention relates to a parallel inverter system, in which each inverter includes a synchronized square wave generator, a voltage given generator, a voltage regulating unit and a power amplifier unit. All of them are connected in parallel in turn. The characteristic is that the output current given of the voltage regulating unit is no longer selection of one out of many any more, but outputs the output of voltage regulators of all of voltage regulating units after linear combination, thereby changing the previous unequal parallel connection to equalized parallel connection. At the same time, the output square waves of all of synchronizing square wave generators are inputted into voltage given generators as the synchronizing square wave after AND. The output sine waves of all of voltage given generators after linear combination are used as given voltage of voltage regulating units.

TECHNICAL FIELD

The present invention relates to a power supply system, moreparticularly to a high power inverter system by connecting several lowerpower inverters in parallel.

BACKGROUND ART

A plurality of lower power inverters can be connected in parallel toform a higher power inverter. In order to connect a plurality ofinverters to form a parallel inverter, the main problem to be solved ishow to reduce the circulating current among the modules. It is necessarynot only to achieve the increasing by integer multiples of theload-carrying capacity, but also to achieve the even distribution of theload, so that all of the inverters have the same MTBF (Mean Time BetweenFailures) in theory, thereby achieving the maximum of the parallelsystem MTBF. In order to achieve such an object, there are followingsolutions in the art.

In the first solution, it adopts a method of master-slave control inorder to connect a plurality of inverters in parallel, that is, acontrol unit is used to control all of the power modules. All the powermodules utilize the same driving signal of SPWM (sine pulse widthmodulation) to obtain substantially the same output, and its controlblock diagram is shown in FIG. 1. This control solution resolves thesynchronization of the output voltages effectively, and adding the meansof regulating bus voltage can achieve higher preciseness of evencurrent. However, the disadvantage is the centralized form of controlunit. A fault occurring in the control unit may cause the whole systemparalyzed. Therefore, after the system is connected in parallel, theimprovement of its MTBF is rather little because the fault bottleneck ispresented.

To overcome the disadvantage of the first solution, the second solutionis provided. In this solution, every inverter is provided with a controlunit, but only one control unit is turned on at any time by way ofintellective selection. If any fault occurs in the control unit, thesystem will jump to some other control unit automatically. Although thesecond solution resolves the problem of the fault bottleneck, thecomplexity and the cost of such a system are increased. Also, theswitching of the driving wave is technically dangerous, which is likelyto lead the damage of the power tube. Moreover, switching the controlunit renders the jump of the amplitude or phase of the output voltage tosome extent, and reduces the purity of the output voltage. Meanwhile, itmay realize the parallel connection of only few power modules since theload-carrying capacity of the control circuit is limited. Anotherdisadvantage of this solution is that a logic control unit must be addedbecause of the necessity of controlling the switches concentratedly, andthus it not only increases the additional cost but also adds the newfault bottleneck.

The third solution is provided to reduce the fault rate of the mastercontrol unit and to prevent the danger brought by switching of thedriving wave. In this solution, the parallel point is moved forward. Thecontrol block diagram of the improved parallel inverter is shown in FIG.2, that is, the parallel point is moved forward to the output point ofthe voltage regulation. At any moment, only one of the selected switchesK1˜Kn can turn on, that is, only one voltage regulating loop is selectedto work, and other voltage loops are in a state of thermal backup.

In comparison with the second solution, the third solution can overcomenot only the problem of fault bottleneck of the control unit, but alsoresolve the danger of the switching of the driving wave. And since thecommonly shared units are fewer, the reliability is enhanced. However,the complexity of the system switching still exists. Switching may alsorender the jump of the amplitude and the phase of the output voltage tosome extent, and the load-carrying capacity of the control circuitcannot be improved. Further, only few power modules can be connected inparallel. This is essentially still a kind of centralized control. Thissolution cannot overcome the problem of switching of centralized controlswitches as well, and should add a logic control unit. This increasesthe cost and the new fault bottleneck. Moreover, the user is likely topull out the inverter being used as the master module due to therequirement of the hot plug, such that the problem caused by themaster-slave switching is more serious.

SUMMARY OF THE INVENTION

With respect to the above deflects in the prior art, the object of thepresent invention is to improve the circuit of the parallel inverter toprovide a parallel inverter system with superior performance.

The object of the invention can be realized by the following technicalsolution that is to construct an inverter system including severalinverters capable of being connected in paralleled.

Each of the several inverter comprises: a synchronous unit forgenerating synchronous signals to ensure the synchronization of voltagegiven signals in the respective inverters being connectable in parallel,a voltage given generator for generating a sine voltage with a givenfrequency, phase and amplitude, a voltage regulating unit for regulatingthe inverter output voltage, and a power amplifier unit for convertingdirectly a direct current power supply into an alternating current powersupply.

It is characterized in that each voltage regulating unit of eachinverter includes a voltage regulator circuit and a voltage linearcombination circuit, and the voltage linear combination circuit combinesall of the output voltages of the voltage regulator linearly, and thenoutputs them to the power amplifier unit.

In the parallel inverter system of the present invention, thesynchronous unit is a synchronizing square wave generator. In thesynchronizing square wave generator, the precise high frequencyoscillating signals are generated by an oscillator, output to a dividerto be made to a square wave with the power frequency, and then outputthough OC gate and fault shield switch K2. The OC gate has the outputsof respective dividers AND and output them to the voltage givengenerator as synchronizing square waves.

A voltage virtual value given circuit inputs a required voltage virtualvalue in the voltage given generator of the parallel inverter system ofthe present invention. The voltage virtual value is outputted to a sinewave generator through a virtual value regulating circuit; and a phasediscriminator receives the synchronizing square wave outputted by thesynchronizing square wave generator, and constitutes a phase-locked loopwith the sine wave generator. The output terminal of the sine wavegenerator connects the voltage regulating unit through the impedancecircuit and the fault shield switch K3, and the output impedance circuitcan combine linearly the outputs of the various sine wave generators toserve as given voltage of the voltage regulating unit.

In the parallel inverter system of the present invention, the poweramplifier unit includes a SPWM generator, a driving circuit, powerswitching tubes and a filter connected in turn. The waves of highfrequency SPWM generated by the SPWM generator are used to drive thepower switching tubes after they are amplified by the driving circuit.The power switching tubes are turned on and off alternately to convertthe direct current into amplified SPWM waves, and the filter removes thecarrier wave of the amplified SPWM wave to obtain the amplified sinepower supply.

In the parallel inverter system of the present invention, the voltageregulator can be P regulation, PI regulation or PID regulation; and thevoltage linear combination circuit comprises an output impedance andfault shield switch (K4).

The voltage regulating unit of the present invention can also include asaturation suppression circuit. The saturation suppression circuitdetects the difference between the output voltage of the voltageregulator and the output linear combination value of the parallelinverter system, and feedbacks it to the voltage regulator.

The current regulator unit can be connected between the voltage unitregulating and the power amplifier unit of the present invention forregulating the distortion of the inverter output voltage and realizingthe even distribution of the load of respective inverters.

In the present invention, the following relation exists between theoutput voltage of respective voltage regulator V_PI(j) and the outputvoltage of the voltage linear combination circuit after linearcombination V_PI_out:${{{V\_ PI}{\_ out}} = {\sum\limits_{j = 1}^{N}\quad{{{K(j)} \cdot {V\_ PI}}(j)}}},$wherein, K(j) is weight number,${\sum\limits_{j = 1}^{N}\quad{K(j)}} = 1.$

While the following relation may exist between the output voltage ofrespective voltage regulator V_PI(j) and the output voltage of thevoltage linear combination circuit after being averaged V_PI_out:${{{V\_ PI}{\_ out}} = {\sum\limits_{j = 1}^{N}\quad{{V\_ PI}{(j) \div N}}}},$wherein N is the number of the parallel inverters.

In the parallel inverter system of the present invention, the voltagelinear combination circuit averages the output voltages of all thevoltage regulators, and then outputs them to the power amplifier unit.

It can be derived from the above-mentioned solution that the parallelinverter system of the present invention can realize theoreticallyparallel connection of any number of inverters; there is not anycentralized logic control unit, and thus no bottleneck problem. There isnot a commonly shared part, and all parallel modules have completely thesame function, and are connected in parallel equally. There is not aselecting switch, and not any control switch problem during the fault.

The present invention will be further described in conjunction with theaccompanying drawings and embodiments.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a control block diagram of the centralized control in theprior art;

FIG. 2 is a block diagram of the improved parallel inverter ofconcentrated control in the art;

FIG. 3 is a schematic block diagram of the parallel inverter system inthe present invention;

FIG. 4 is a schematic block diagram of the synchronizing square wavegenerator in the present invention;

FIG. 5 is a schematic block diagram of the given voltage generator inthe present invention;

FIG. 6 is a schematic block diagram of the voltage regulating unit inthe present invention;

FIG. 7 is a circuit diagram of the voltage regulator and the voltagelinear combination circuit of the embodiment of the present invention;

FIG. 8 is a diagrammatic view of an embodiment of the present inventionwhen the output impedances of the two voltage linear combinationcircuits are equal;

FIG. 9 is a diagrammatic view of another embodiment of the presentinvention when the output impedances of the two voltage linearcombination circuits are unequal;

FIG. 10 is a circuit diagram of the current regulating unit of theembodiment of the present invention;

FIG. 11 is a circuit diagram of the virtual value regulation of theembodiment of the present invention.

DETAIL DESCRIPTION OF PREFERRED EMBODIMENTS

FIG. 3 shows a schematic block diagram of the parallel inverter systemof the present invention. It can be seen from FIG. 3 that there are ninverters connected in parallel in the parallel inverter system, andeach inverter includes a synchronizing square wave generator, a voltagegiven generator, a voltage regulating unit, a current regulating unitand a power amplifier unit. Moreover, a voltage feedback circuit is alsoset for feeding back the voltage sampled at the inverter output terminalto the voltage given generator and the voltage regulating unit, and acurrent feedback circuit for feeding back the current sampled at theoutput terminal of the power amplifier unit to the circuit regulatingunit.

In comparison with the above-mentioned third solution in the prior art,the main improvement of the present invention is that the current givenis no longer selection of one out of many any more; but the output ofvoltage regulators of all of the voltage regulating units are used asthe current given after linear combination, thereby changing theprevious un-equalized parallel to equalized parallel. Meanwhile, theoutput square waves of all synchronizing square wave generators are usedas synchronized square wave output of the voltage given generators afterbeing AND, and the output sine waves of all the voltage given generatorsare voltage given of the voltage regulating units after being linearcombination.

The functions of respective parts are illustrated hereinafter.

1. Synchronizing Square Generator

As shown in FIG. 3, the synchronizing unit uses the synchronizing squarewave generator, of which the schematic diagram is shown in FIG. 4,wherein the oscillator comprises RC, LC, crystal oscillator or crystal,which is used to generate precise high frequency oscillating signals. Adivider processes the high frequency oscillating signals to be the powerfrequency square wave; K1 chases selectively the city power supply, anddetects the zero-cross of the city power supply. K1 may also chaseselectively the local oscillator, and the divider is connected to the OCgate though K1, and then connected to the voltage given generator thoughK2. When K2 is closed, the synchronizing square wave generatorparticipates in the output; while a fault occurs at the front-end of theK2, and K2 is opened, the synchronizing square wave generator does notparticipates in the output, whereby the fault can be shielded. Since thesynchronizing square wave generator of each inverter is outputted afterAND through OC gate, the open of K2 will not affect the work of theparallel system. The reset pulse generator is used as a reset divider toenable the local oscillator always follow the output synchronizingsquare wave such that the close of K2 does not affect the frequency andphrase of the synchronizing square wave of the system.

In the present invention, the synchronizing unit can also realize thesynchronization of the voltage given signals by following the city powersupply or communicating between the microprocessors and the like. Thisis not limited to the synchronizing square wave generator shown in FIG.3.

2. Voltage Given Generator

The principle of the voltage given generator is shown in FIG. 5, whichgenerates primarily the pure sine waves of the given frequency, phraseand amplitude, and regulates the virtual value of the output voltage.

The virtual value of the voltage is to map the virtual value of theoutput voltage. After powering up, the virtual value of the voltageshould rise slowly from zero to the given value, to realize the softstart of the inverter. The regulating unit is used to regulate thevirtual value of the output voltage to make it follow the given virtualvalue of the voltage. When the inverter causes the virtual value of theoutput voltage to change for some reason, the regulating loop cancompensate for it. The regulator in the regulating unit can be aswitching regulation, P regulation, PI regulation or PID regulation. Thephase discriminator and the sine wave generator constitute a phaselocked loop to synchronize the sine wave outputted from the sinegenerator with the synchronizing square wave. The amplitude of the sinewave generated by the sine wave generator relates to the regulation ofthe virtual value, and the frequency and phase relate to thesynchronizing square wave. The output impedance is used to calculate theaverage of the respective parallel units. When K3 is closed, the voltagegiven generator participate in the output; and when a fault occurs atthe front-end of K3, K3 is closed to shield the fault, and the voltagegiven generator does not participate in the output. Since the outputs ofthe respective sine wave generators are given voltage of the voltageregulating unit after linear combination through the output impedancecircuit, the system can still work normally when K3 is opened.

In the present invention, the preferred embodiment of the circuit forthe regulation of the virtual value is shown in FIG. 11. The regulationof the virtual value compensates primarily for the output voltage dropdue to the load, thereby stabilizing the virtual value of the outputvoltage of the system within the designed range. PI regulation is usedhere, but it is not limited to PI regulation.

3. Voltage Regulating Unit

The voltage regulating unit is mainly used to regulate the distortion ofthe output voltage of the inverter. As shown in FIG. 6, the forms ofvoltage regulator circuit are various, and the specific form isdetermined according to the requirement of the system. When K4 isclosed, the voltage regulating unit participates in the output; theoutput impedance is used to calculate the linear combination of theoutput voltages of voltage regulator of each parallel unit. After thelinear combination is calculated, the bias error caused by thedisagreement of the outputs of the voltage regulators can be eliminated.If the fault occurs at the front-end of K4, opening K4 can shield thefault. Since the output of each voltage regulator circuit is linearlycombined through the output impedance, the system can still worknormally.

The preferred embodiment circuit of the voltage regulating unit is shownin FIG. 7, wherein the voltage regulator is PI regulator, but it can beP regulation, PID regulation and the like in the practical application.The output resistance R2 is mainly used to obtain the value of theparallel linear combination, and it can be all kinds of forms, such ascapacitive impedance, or inductive impedance. Whatever the form is, themain object is that the result obtained on the parallel signal line isthe linear combination value of the outputs from the respective voltageregulators when two or more inverters are connected in parallel.

In the voltage regulator units of all the inverters, the voltage linearcombination circuit combines linearly the output voltages of all of thevoltage regulator circuits and then outputs it. It is assumed that theoutput voltage of template j is V_PI(j), wherein j=1,2, . . . ,N, andthe coefficient is K(j), and then the output voltage obtained after thelinear combination is${{{V\_ PI}{\_ out}} = {\sum\limits_{j = 1}^{N}\quad{{{K(j)} \cdot {V\_ PI}}(j)}}},$the coefficient K(j) can be calculated according to the practicalparameters of the circuit.

In the two embodiments shown in FIG. 8 and FIG. 9, the followingrelationship exists:${\sum\limits_{j = 1}^{N}\quad\frac{{{V\_ PI}(j)} - {{V\_ PI}{\_ out}}}{Rj}} = 0$

After conversion, obtained here is that${K(j)} = {\frac{1}{{Rj}{\sum\limits_{j = 1}^{N}\quad\frac{1}{Rj}}}.}$In FIG. 8, since the output resistances of the two voltage linearcombination circuits are both 1000 Ω, it can be calculated from thecircuit that:

-   -   V_PI_out=0.5 V_PI1+0.5 V_PI2

It is a common average mode, which corresponds to dividing the result ofthe addition of the both by two.

In FIG. 9, since the output resistance is 1000 Ω in the upper voltagelinear combination circuit, and the output resistance is 10000 Ω in thelower voltage linear combination circuit, it is can be calculated that:${{V\_ PI}{\_ out}} = {{\frac{10}{11} \cdot {V\_ PI1}} + {\frac{1}{11} \cdot {V\_ PI2}}}$

The coefficient K(j) being 1/N is a preferred embodiment of the presentinvention. This is because the materials of the respective parallelmodules are completely the same, and it will be beneficial to theproduction and to detection of the fault of the voltage regulator, andeliminate more efficiently the differences among various modules.

In the voltage regulating unit shown in FIG. 7, PI voltage regulator andthe linear combination circuit have a disadvantage that when the two (ormore) inverters are connected in parallel, the slight difference offeedback can cause the two PI voltage regulator circuits to saturateoppositely, that is, one is positive saturation and the other negativesaturation, such that the regulating ability of the PI voltage regulatoris weaken, and the output waves become poor. To solve this problem, thesaturation suppression circuit is added in FIG. 7. The differencebetween the output of the PI voltage regulator and the linearcombination value of the output of the PI voltage regulators of all ofthe modules detected by the saturation suppression circuit is fed backto the PI regulator, so that the difference between the PI voltageregulator and the linear combination value is restrained. Therefore, thedisadvantage of the abnormal saturation of the PI voltage regulator isrestrained.

4. Current Regulating Unit

The usage of the current regulating unit is to improve the even loadperformance of the respective inverters. In practical application, itcan be decided whether or not the unit is used according to therequirements of the system. The current loop can be P regulation, PIregulation, PID regulation or the current, as decided according to therequirements of the system.

In the present invention, the circuit of the preferred embodiment of thecurrent regulating unit is shown in FIG. 10, wherein P regulation isutilized. This regulation is mainly used for the current sharing, andcan also improve the distortion of the output voltage.

5. Power Amplifier Unit

The usage of the power amplifier unit is to convert a direct currentpower supply to an alternating current power supply, which typicallycomprises a SPWM generator, a driving circuit, power switching tubes anda filter, wherein the SPWM generator compares the given sine voltagesignal with high frequency triangular wave to generate SPWM wave withhigh frequency. The driving circuit uses the SPWM wave to drive thepower switching tubes, and the power switching tubes convert the directcurrent into an amplified SPWM wave through switching alternatively. Theamplified SPWM wave is filtered out the carrier wave by the filter, andthen the sine alternating current power supply is obtained.

It can be seen from the technical solution of the present invention andthe detailed embodiment that the present invention has the followadvantages in comparison with the technical solutions in the priorart: 1) any amount of the inverters can be theoretically connected inparallel; 2) there is no centralized control unit so that there is nofault bottleneck problem; and 3) the functions of all of the parallelconnected modules are the same, that is, parallel connection equally.

1. A parallel inverter system having a plurality of inverters, each ofthe plurality of said inverters comprising a synchronous unit forgenerating synchronous signals to ensure synchronization of a voltagegiven signals in the respective inverters which can be connected inparallel, a voltage given generator for generating a sine voltage with agiven frequency, a phase and amplitude, a voltage regulating unit forregulating the inverter output voltage, and a power amplifier unit forconverting directly a direct current power supply into an alternatingcurrent power supply, characterized in that each voltage regulating unitof each inverter includes a voltage regulator circuit and a voltagelinear combination circuit, and the voltage linear combination circuitcombines linearly all of the output voltages of the voltage regulator,and then outputs them to the power amplifier unit.
 2. The parallelinverter system of claim 1, wherein the synchronous unit is asynchronizing square wave generator, wherein precise high frequencyoscillating signals are generated by an oscillator in the synchronizingsquare wave generator, output to the divider to form a square wave withthe power frequency, and then output though an OC gate and fault shieldswitch K2, and then output the outputs of respective dividers after ANDto the voltage given generator as synchronizing square waves.
 3. Theparallel inverter system of claim 1, wherein the voltage given generatora voltage virtual value given circuit inputs a required voltage virtualvalue, which is outputted to a sine wave generator through a virtualvalue regulating circuit; a phase discriminator receives thesynchronizing square wave output by the synchronizing square wavegenerator, and constitutes a phase-locked loop with the sine wavegenerator; the output terminal of the sine wave generator connects thevoltage regulating unit, and the output impedance circuit can linearlycombine the outputs of the various sine wave generators through theimpedance circuit and the fault shield switch (K3) to give it as thevoltage of the voltage regulating unit.
 4. The parallel inverter systemof claim 1, wherein the amplifier unit includes a SPWM generator, adriving circuit, a power switching tube and a filter connected in turn;the high frequency SPWM waves generated by the SPWM generators are usedto drive power switching tubes after they are amplified by the drivingcircuit, the power switching tubes are turned on and off alternately toconvert the direct current into amplified SPWM wave, and the amplifiedSPWM wave is moved the carrier wave by the filter to get the amplifiedsine alternating-current power supply.
 5. The parallel inverter systemof claim 1, wherein the voltage regulating unit the voltage regulatorcan be P regulation, PI regulation or PID regulation; and a voltagelinear combination circuit comprises an output impedance and a faultshield switch (K4).
 6. The parallel inverter system of claim 1, whereinthe voltage regulator unit can also include a saturation suppressioncircuit, the saturation suppression circuit detecting the differencebetween the output voltage of the voltage regulator and the outputlinear combination value of the parallel inverter system, and feedingback to it to the voltage regulator.
 7. The parallel inverter system ofclaim 1, wherein the current regulator unit for regulating thedistortion of the inverter output voltage and realizing the evendistribution of the load of respective inverters is connected betweenthe voltage unit for regulating the power amplifier unit of the presentinvention.
 8. The parallel inverter system of claim 1, wherein thefollowing relation exists between the output voltage of respectivevoltage regulator V_PI(j) and the output voltage of the voltage linearcombination circuit after linear combination V_PI_out,${{{V\_ PI}{\_ out}} = {\sum\limits_{j = 1}^{N}\quad{{{K(j)} \cdot {V\_ PI}}(j)}}},$wherein K(j) is weight number,${\sum\limits_{j = 1}^{N}\quad{K(j)}} = 1.$
 9. The parallel invertersystem of claim 1, wherein the following relation exists between theoutput voltage of respective voltage regulator V_PI(j) and the outputvoltage of the voltage linear combination circuit after averageV_PI_out,${{{V\_ PI}{\_ out}} = {\sum\limits_{j = 1}^{N}\quad{{V\_ PI}{(j) \div N}}}},$wherein N is the number of the parallel inverters.